Sram Design Project

Our client is seeking experienced Memory Designers with a track record of placing chips into production. Responsibilities Include:

  • Working with a senior project leader designing, simulating, and supervising the layout of large blocks of circuitry, such as address buffers, decoders, control circuitry, sense-amps, band-gap voltage references, on-chip power supplies, write drivers, and I/O buffers
  • Work with Product and Test Engineers evaluating and debugging circuit performance after silicon processing
  • Work on current and next generation memory products as a member of a small focused team


Candidates must possess high speed SRAM design experience. Analog circuit expertise, and/or logic verification skills are desired. Successful candidates will have a solid grasp of circuit theory and be versed in electromagnetic fields; probability and statistics, semiconductor physics, semiconductor process steps, and logic design. Other Useful Skills:
  • Parasitic extraction
  • Evaluation and debug parasitic extraction and annotation
  • Logic verification expertise
  • Static timing analysis and equivalence checking
For consideration please send your resume directly to Jared Taylor at (see below)

Click Here To Apply

PERISCOPE: Pragmatic Efficient Reliable Internetworking Solution Using Consumer-Centric Omnipresent Ethernet
DE: (3 Post) Eligibility : B.E/B.Tech Degree and credited VHDL (preferred) or Verilog design, credited digital design coursework and relevant work experience. Areas of design, development, and test will involve one or more of the following areas: - Embedded Hardware Software design, - High-speed serial interfaces (upto 10 Gbps), and other industry standard interfaces (e.g. 10/100/1000 Ethernet, 10G Ethernet, SPI, UART, QDRII+ SRAM, DDR2, DDR3).
Salary : Consolidated salary Rs.20000/- p.m. + HRA
Job Profile : Development of FPGA specifications. Development of detailed architectures. Implementing algorithms in FPGA design using VHDL/VERILOG. Instantiating synthesizable VHDL/VERILOG code applicable to large FPGA design.Generating test bench code and providing code coverage applicable to a large instantiated FPGA design. Using tools such as Xilinx ISE, Synplicity (Synopsys), and ModelSim. Trouble shooting and diagnostic/debug.
DE: (2 Post) Eligibility : B.E/B.Tech Degree and credited VHDL (preferred) or Verilog design, credited digital design coursework and relevant work experience. Areas of design, development, and test will involve one or more of the following areas: - Embedded Hardware Software design, - High-speed serial interfaces (upto 10 Gbps), and other industry standard interfaces (e.g. 10/100/1000 Ethernet, 10G Ethernet, SPI, UART, QDRII+ SRAM, DDR2, DDR3).
Salary : Consolidated salary Rs.20000/- p.m. + HRA
Job Profile : Development of FPGA specifications. Development of detailed architectures. Implementing algorithms in FPGA design using VHDL/VERILOG. Instantiating synthesizable VHDL/VERILOG code applicable to large FPGA design.Generating test bench code and providing code coverage applicable to a large instantiated FPGA design. Using tools such as Xilinx ISE, Synplicity (Synopsys), and ModelSim. Trouble shooting and diagnostic/debug.

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